/*
	CPU_exception.h

	contains information for CPU exception handling

	Author: Aidan Goddard 26/12/13
*/

#ifndef CPU_EXCEPTION_H_INCLUDED
#define CPU_EXCEPTION_H_INCLUDED

#include"types.h"

// definitions for each of the ISRs
void CPU_EXCEPTION_0_DE(void);
void CPU_EXCEPTION_1_DB(void);
void CPU_EXCEPTION_2_NMI(void);
void CPU_EXCEPTION_3_BP(void);
void CPU_EXCEPTION_4_OF(void);
void CPU_EXCEPTION_5_BR(void);
void CPU_EXCEPTION_6_UD(void);
void CPU_EXCEPTION_7_NM(void);
void CPU_EXCEPTION_8_DF(void);
void CPU_EXCEPTION_10_TS(void);
void CPU_EXCEPTION_11_NP(void);
void CPU_EXCEPTION_12_SS(void);
void CPU_EXCEPTION_13_GP(void);
void CPU_EXCEPTION_14_PF(void);
void CPU_EXCEPTION_16_MF(void);
void CPU_EXCEPTION_17_AC(void);
void CPU_EXCEPTION_18_MC(void);
void CPU_EXCEPTION_19_XF(void);
void CPU_EXCEPTION_30_SX(void);


// the register state table
struct REGISTER_STATE
{
	// FPU state
	uint8_t FPU[3072];

	// control register states
	uint64_t CR4;
	uint64_t CR3;
	uint64_t CR2;
	uint64_t CR1;
	uint64_t CR0;

	// GP registers
	uint64_t R15;
	uint64_t R14;
	uint64_t R13;
	uint64_t R12;
	uint64_t R11;
	uint64_t R10;
	uint64_t R9;
	uint64_t R8;
	uint64_t RDI;
	uint64_t RSI;
	uint64_t RDX;
	uint64_t RCX;
	uint64_t RBX;
	uint64_t RAX;

	// value indicating which exception called the handler
	// corresponds to the x86-64 exception vectors
	uint64_t EXCEPTION;

	// error value pushed by CPU or by handler for padding
	// may contain garbage if the ISR does not have an error code
	uint64_t ERROR_CODE;

	// end of ISR stack frame - RSP should point to the RIP value
	// before IRETQ
	uint64_t RIP; // <-- RSP should point here when IRETQ-ing
	uint64_t CS;
	uint64_t RFLAGS;
	uint64_t RSP;
	uint64_t SS;

	// top of ISR stack frame
};

// handler
struct REGISTER_STATE *CPUExceptionHandler(struct REGISTER_STATE *regs);

#endif
